8031 based repeater logic technical description.


The logic board fitted to GB3BF and GB3BL is a re-engineering of the old 6502 logic board which was, in turn, derived from the original logic by G8ELA.


Control Logic Hardware


This logic board uses an 89C51 micro-controller consisting of a microprocessor with on-board RAM, flash memory (for the program), I/O ports, timers and a serial port, all in one 40-pin chip (the earlier incarnation of 'BF which served from 1994 until 2004 used an 8751H, this had an E-PROM on board instead of the flash).


The 89C51/8751 solution allows a reduction in the component count compared to the older logic which consists of a 6502 processor, 2532 E-PROM, INS8154 RAM/IO chip and several TTL ICs for support.


CTCSS operation is supported by the use of 2 CML FX365 ICs, one for Receive and one for Transmit. This allows the repeater to decode and encode CTCSS simultaneously. These ICs are loaded by the controller allowing the tone frequencies to be set in the software.


1750Hz tone burst operation is supported by the use of an NE567 tone decoder.


Control Logic Software


The logic was written by G8MGP, it is a "port" of the proven 6502 based program which was originally written by G8ELA in the early 1980s and modified by G8MGP. The new program was developed on a DALLAS DS5000 "soft" processor for ease of modification and debugging.


The only noticeable change to the operation of the repeater compared to the old logic is the addition of the timeout.


Extensive code changes were done to use features of the 8031 family processors that are not provided on the 6502 and to use the processor control facilities on the FX365 CTCSS ICs. These changes allow most of the hardwired TTL support logic to be replaced by software and results in a lower IC count and more flexibility - the repeater's operation is entirely controlled by the software, you don't need to get the soldering iron out to change it!


One of the most important features of the 8031 instruction set is the fact that it can address the I/O pins individually and has instructions for manipulating single bit variables. This, in conjunction with the interrupt timer allows you to have a "background task" which replaces all the hard-wired logic used for implementing things like the 1750Hz "notch" and controlling CTCSS encode and decode.


Dave Hill June 2005.